I know that there are so many available methodologies for IC verification out there, such as UVM, VMM, etc. I also know that many EDA gaints in semiconductor industry like Synopsys and Candence are still trying their best to provide better, faster, more transparent methods (namely some emulators) to make it possible to verify a very complecated IC design in more comprehensive coverage scale. However, I'm not sure if any of them had ever proposed such an idea: To create stimulus and run simulation simultaneously. What it feels like? Well, in my imagination, after the simulation starts as normal, the waveform is dumped at a 100MB data size basis, you can view the waveform in the simulation tool and see what is going on in the system at real time, and whenever you want the CPU to execute a specific task, you launch a command shell in the terminal, type in some command like 'enter_debug_mode', the CPU will halt at the current PC and wait for your next command, and then you type in other commands like 'read_addr 0x8000_0000', then the CPU will initiate a bus access to that location, fetch the data and print it to the shell. How does that sound to you? Isn't that great? I was first inspired of this idea from a lecture about ZeBu (a emulation server made by Synopsys), on which you could simulate your logics base on real devices. But with my RTSS (short for Real Time Stimulus & Simulation, you would not be able to find its definition elsewhere, because I just invented it) platform, you could
