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Kellen Wang, 编程语言相关内容作者

KellenWang

Winnie Chen, 自然语言相关内容作者

22 个评论 在 “关于我们

  1. module wjl(N,A,B,clk); //模块定义
    input[15:0]A,B; // 输入两个电压
    input clk; // 输入一个时钟脉冲信号
    output[2:0] N; // 输出扇区N
    wire [2:0] N; // 定义wire的变量同时赋予位宽
    reg[1:0] x,y,z; // 定义三个中间变量同时赋予位宽,负责判断
    parameter c=16’b0010000000000000; //Q14的16位二进制格式
    parameter d=16’b0011011101101101;
    wire[15:0] b0,b1,b2; // 定义三个中间变量同时赋予位宽
    assign b0=B; // 定义三个公式
    assign b1=d*A-c*B; // 将两个小数换成二进制格式进行运算
    assign b2=-d*A-c*B;
    always@(posedge clk) //一个时钟上升沿信号触发
    begin
    begin // 此处用于逻辑判断,进行是否等于一的逻辑判断
    if (b0>0)
    x=1;
    else x=0;
    end
    begin
    if (b1>0)
    y=1;
    else y=0;
    end
    begin
    if (b2>0)
    z=1;
    else z=0;
    end
    end
    assign N=x+2*y+4*z; //最后用公式将他们按比例相加
    endmodule // 结束模块
    程序实现的功能:{B0=Uβ;B1=(√3)/2Uα-1/2 Uβ;B2=-(√3)/2Uα-1/2 Uβ}
    IF B0>0,x=1,否则x=0;IF B1>0,y=1,否则y=0;IF B2>0,z=1,否则z=0;
    最后通过 N=x+2*y+4*得出N;现在就是编译后得到的N值不对。
    初学菜鸟,望大神帮忙,谢谢~~~~

  2. [source lang=”verilog”]
    module wjl(N,A,B,clk); //模块定义
    input[15:0]A,B; // 输入两个电压
    input clk; // 输入一个时钟脉冲信号
    output[2:0] N; // 输出扇区N
    wire [2:0] N; // 定义wire的变量同时赋予位宽
    reg[1:0] x,y,z; // 定义三个中间变量同时赋予位宽,负责判断
    parameter c=16’b0010000000000000; //Q14的16位二进制格式
    parameter d=16’b0011011101101101;
    wire[15:0] b0,b1,b2; // 定义三个中间变量同时赋予位宽
    assign b0=B; // 定义三个公式
    assign b1=d*A-c*B; // 将两个小数换成二进制格式进行运算
    assign b2=-d*A-c*B;
    always@(posedge clk) //一个时钟上升沿信号触发
    begin
    begin // 此处用于逻辑判断,进行是否等于一的逻辑判断
    if (b0>0)
    x=1;
    else x=0;
    end
    begin
    if (b1>0)
    y=1;
    else y=0;
    end
    begin
    if (b2>0)
    z=1;
    else z=0;
    end
    end
    assign N=x+2*y+4*z; //最后用公式将他们按比例相加
    endmodule // 结束模块
    [/source]
    程序实现的功能:{B0=Uβ;B1=(√3)/2Uα-1/2 Uβ;B2=-(√3)/2Uα-1/2 Uβ}
    IF B0>0,x=1,否则x=0;IF B1>0,y=1,否则y=0;IF B2>0,z=1,否则z=0;
    最后通过 N=x+2*y+4*得出N;现在就是编译后得到的N值不对。
    初学菜鸟,望大神帮忙,谢谢~~~~

  3. 你b1、b2的位宽怎么可能够用呢?A是16比特,c也是16比特,A * c才16比特吗?你仿真的时候仔细看看中间变量是哪里出错的。我觉得很可能是位宽的问题。另外你这个模块根本就不需要时钟,把always@(posedge clk)改成always@(*)吧,端口的时钟也不用给了。

  4. 1、Error (170065): Cannot split carry or cascade chain crossing 238 logic cells and starting on logic cell “lpm_mult:Mult1|mult_kft:auto_generated|op_1~0” into legal LABs
    Info (170069): List of logic cells in the chain (ordered from chain start to end)
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~0”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~2”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~4”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~6”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~8”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~10”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~12”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~14”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~16”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~18”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~20”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~22”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~24”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~26”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~28”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~30”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~32”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~34”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~36”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~38”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~40”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~42”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~44”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~46”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~48”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~50”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~52”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~54”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~56”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~58”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~60”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~62”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~64”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~66”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~68”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~70”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~72”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~74”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~76”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~78”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~80”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~82”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~84”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~86”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~88”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~90”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~92”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~94”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~96”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~98”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~100”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~102”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~104”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~106”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~108”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~110”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~112”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~114”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~116”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~118”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~120”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~122”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~124”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~126”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~128”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~130”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~132”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~134”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~136”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~138”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~140”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~142”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~144”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~146”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~148”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~150”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~152”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~154”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~156”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~158”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~160”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~162”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~164”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~166”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~168”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~170”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~172”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~174”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~176”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~178”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~180”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~182”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~184”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~186”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~188”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~190”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~192”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~194”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~196”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~198”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~200”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~202”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~204”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~206”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~208”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~210”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~212”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~214”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~216”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~218”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~220”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~222”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~224”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~226”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~228”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~230”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~232”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~234”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~236”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~238”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~240”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~242”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~244”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~246”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~248”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~250”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~252”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~254”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~256”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~258”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~260”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~262”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~264”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~266”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~268”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~270”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~272”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~274”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~276”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~278”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~280”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~282”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~284”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~286”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~288”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~290”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~292”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~294”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~296”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~298”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~300”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~302”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~304”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~306”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~308”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~310”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~312”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~314”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~316”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~318”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~320”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~322”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~324”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~326”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~328”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~330”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~332”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~334”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~336”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~338”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~340”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~342”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~344”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~346”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~348”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~350”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~352”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~354”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~356”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~358”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~360”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~362”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~364”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~366”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~368”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~370”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~372”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~374”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~376”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~378”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~380”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~382”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~384”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~386”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~388”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~390”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~392”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~394”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~396”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~398”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~400”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~402”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~404”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~406”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~408”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~410”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~412”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~414”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~416”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~418”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~420”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~422”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~424”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~426”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~428”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~430”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~432”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~434”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~436”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~438”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~440”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~442”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~444”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~446”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~448”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~450”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~452”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~454”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~456”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~458”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~460”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~462”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~464”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~466”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~468”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~470”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~472”
    Info (170000): Node “lpm_mult:Mult1|mult_kft:auto_generated|op_1~474”
    2、Error (170065): Cannot split carry or cascade chain crossing 243 logic cells and starting on logic cell “b2[13]~0” into legal LABs
    Info (170069): List of logic cells in the chain (ordered from chain start to end)
    Info (170000): Node “b2[13]~0”
    Info (170000): Node “b2[14]~2”
    Info (170000): Node “b2[15]~4”
    Info (170000): Node “b2[16]~6”
    Info (170000): Node “b2[17]~8”
    Info (170000): Node “b2[18]~10”
    Info (170000): Node “b2[19]~12”
    Info (170000): Node “b2[20]~14”
    Info (170000): Node “b2[21]~16”
    Info (170000): Node “b2[22]~18”
    Info (170000): Node “b2[23]~20”
    Info (170000): Node “b2[24]~22”
    Info (170000): Node “b2[25]~24”
    Info (170000): Node “b2[26]~26”
    Info (170000): Node “b2[27]~28”
    Info (170000): Node “b2[28]~30”
    Info (170000): Node “b2[29]~32”
    Info (170000): Node “b2[30]~34”
    Info (170000): Node “b2[31]~36”
    Info (170000): Node “b2[32]~38”
    Info (170000): Node “b2[33]~40”
    Info (170000): Node “b2[34]~42”
    Info (170000): Node “b2[35]~44”
    Info (170000): Node “b2[36]~46”
    Info (170000): Node “b2[37]~48”
    Info (170000): Node “b2[38]~50”
    Info (170000): Node “b2[39]~52”
    Info (170000): Node “b2[40]~54”
    Info (170000): Node “b2[41]~56”
    Info (170000): Node “b2[42]~58”
    Info (170000): Node “b2[43]~60”
    Info (170000): Node “b2[44]~62”
    Info (170000): Node “b2[45]~64”
    Info (170000): Node “b2[46]~66”
    Info (170000): Node “b2[47]~68”
    Info (170000): Node “b2[48]~70”
    Info (170000): Node “b2[49]~72”
    Info (170000): Node “b2[50]~74”
    Info (170000): Node “b2[51]~76”
    Info (170000): Node “b2[52]~78”
    Info (170000): Node “b2[53]~80”
    Info (170000): Node “b2[54]~82”
    Info (170000): Node “b2[55]~84”
    Info (170000): Node “b2[56]~86”
    Info (170000): Node “b2[57]~88”
    Info (170000): Node “b2[58]~90”
    Info (170000): Node “b2[59]~92”
    Info (170000): Node “b2[60]~94”
    Info (170000): Node “b2[61]~96”
    Info (170000): Node “b2[62]~98”
    Info (170000): Node “b2[63]~100”
    Info (170000): Node “b2[64]~102”
    Info (170000): Node “b2[65]~104”
    Info (170000): Node “b2[66]~106”
    Info (170000): Node “b2[67]~108”
    Info (170000): Node “b2[68]~110”
    Info (170000): Node “b2[69]~112”
    Info (170000): Node “b2[70]~114”
    Info (170000): Node “b2[71]~116”
    Info (170000): Node “b2[72]~118”
    Info (170000): Node “b2[73]~120”
    Info (170000): Node “b2[74]~122”
    Info (170000): Node “b2[75]~124”
    Info (170000): Node “b2[76]~126”
    Info (170000): Node “b2[77]~128”
    Info (170000): Node “b2[78]~130”
    Info (170000): Node “b2[79]~132”
    Info (170000): Node “b2[80]~134”
    Info (170000): Node “b2[81]~136”
    Info (170000): Node “b2[82]~138”
    Info (170000): Node “b2[83]~140”
    Info (170000): Node “b2[84]~142”
    Info (170000): Node “b2[85]~144”
    Info (170000): Node “b2[86]~146”
    Info (170000): Node “b2[87]~148”
    Info (170000): Node “b2[88]~150”
    Info (170000): Node “b2[89]~152”
    Info (170000): Node “b2[90]~154”
    Info (170000): Node “b2[91]~156”
    Info (170000): Node “b2[92]~158”
    Info (170000): Node “b2[93]~160”
    Info (170000): Node “b2[94]~162”
    Info (170000): Node “b2[95]~164”
    Info (170000): Node “b2[96]~166”
    Info (170000): Node “b2[97]~168”
    Info (170000): Node “b2[98]~170”
    Info (170000): Node “b2[99]~172”
    Info (170000): Node “b2[100]~174”
    Info (170000): Node “b2[101]~176”
    Info (170000): Node “b2[102]~178”
    Info (170000): Node “b2[103]~180”
    Info (170000): Node “b2[104]~182”
    Info (170000): Node “b2[105]~184”
    Info (170000): Node “b2[106]~186”
    Info (170000): Node “b2[107]~188”
    Info (170000): Node “b2[108]~190”
    Info (170000): Node “b2[109]~192”
    Info (170000): Node “b2[110]~194”
    Info (170000): Node “b2[111]~196”
    Info (170000): Node “b2[112]~198”
    Info (170000): Node “b2[113]~200”
    Info (170000): Node “b2[114]~202”
    Info (170000): Node “b2[115]~204”
    Info (170000): Node “b2[116]~206”
    Info (170000): Node “b2[117]~208”
    Info (170000): Node “b2[118]~210”
    Info (170000): Node “b2[119]~212”
    Info (170000): Node “b2[120]~214”
    Info (170000): Node “b2[121]~216”
    Info (170000): Node “b2[122]~218”
    Info (170000): Node “b2[123]~220”
    Info (170000): Node “b2[124]~222”
    Info (170000): Node “b2[125]~224”
    Info (170000): Node “b2[126]~226”
    Info (170000): Node “b2[127]~228”
    Info (170000): Node “b2[128]~230”
    Info (170000): Node “b2[129]~232”
    Info (170000): Node “b2[130]~234”
    Info (170000): Node “b2[131]~236”
    Info (170000): Node “b2[132]~238”
    Info (170000): Node “b2[133]~240”
    Info (170000): Node “b2[134]~242”
    Info (170000): Node “b2[135]~244”
    Info (170000): Node “b2[136]~246”
    Info (170000): Node “b2[137]~248”
    Info (170000): Node “b2[138]~250”
    Info (170000): Node “b2[139]~252”
    Info (170000): Node “b2[140]~254”
    Info (170000): Node “b2[141]~256”
    Info (170000): Node “b2[142]~258”
    Info (170000): Node “b2[143]~260”
    Info (170000): Node “b2[144]~262”
    Info (170000): Node “b2[145]~264”
    Info (170000): Node “b2[146]~266”
    Info (170000): Node “b2[147]~268”
    Info (170000): Node “b2[148]~270”
    Info (170000): Node “b2[149]~272”
    Info (170000): Node “b2[150]~274”
    Info (170000): Node “b2[151]~276”
    Info (170000): Node “b2[152]~278”
    Info (170000): Node “b2[153]~280”
    Info (170000): Node “b2[154]~282”
    Info (170000): Node “b2[155]~284”
    Info (170000): Node “b2[156]~286”
    Info (170000): Node “b2[157]~288”
    Info (170000): Node “b2[158]~290”
    Info (170000): Node “b2[159]~292”
    Info (170000): Node “b2[160]~294”
    Info (170000): Node “b2[161]~296”
    Info (170000): Node “b2[162]~298”
    Info (170000): Node “b2[163]~300”
    Info (170000): Node “b2[164]~302”
    Info (170000): Node “b2[165]~304”
    Info (170000): Node “b2[166]~306”
    Info (170000): Node “b2[167]~308”
    Info (170000): Node “b2[168]~310”
    Info (170000): Node “b2[169]~312”
    Info (170000): Node “b2[170]~314”
    Info (170000): Node “b2[171]~316”
    Info (170000): Node “b2[172]~318”
    Info (170000): Node “b2[173]~320”
    Info (170000): Node “b2[174]~322”
    Info (170000): Node “b2[175]~324”
    Info (170000): Node “b2[176]~326”
    Info (170000): Node “b2[177]~328”
    Info (170000): Node “b2[178]~330”
    Info (170000): Node “b2[179]~332”
    Info (170000): Node “b2[180]~334”
    Info (170000): Node “b2[181]~336”
    Info (170000): Node “b2[182]~338”
    Info (170000): Node “b2[183]~340”
    Info (170000): Node “b2[184]~342”
    Info (170000): Node “b2[185]~344”
    Info (170000): Node “b2[186]~346”
    Info (170000): Node “b2[187]~348”
    Info (170000): Node “b2[188]~350”
    Info (170000): Node “b2[189]~352”
    Info (170000): Node “b2[190]~354”
    Info (170000): Node “b2[191]~356”
    Info (170000): Node “b2[192]~358”
    Info (170000): Node “b2[193]~360”
    Info (170000): Node “b2[194]~362”
    Info (170000): Node “b2[195]~364”
    Info (170000): Node “b2[196]~366”
    Info (170000): Node “b2[197]~368”
    Info (170000): Node “b2[198]~370”
    Info (170000): Node “b2[199]~372”
    Info (170000): Node “b2[200]~374”
    Info (170000): Node “b2[201]~376”
    Info (170000): Node “b2[202]~378”
    Info (170000): Node “b2[203]~380”
    Info (170000): Node “b2[204]~382”
    Info (170000): Node “b2[205]~384”
    Info (170000): Node “b2[206]~386”
    Info (170000): Node “b2[207]~388”
    Info (170000): Node “b2[208]~390”
    Info (170000): Node “b2[209]~392”
    Info (170000): Node “b2[210]~394”
    Info (170000): Node “b2[211]~396”
    Info (170000): Node “b2[212]~398”
    Info (170000): Node “b2[213]~400”
    Info (170000): Node “b2[214]~402”
    Info (170000): Node “b2[215]~404”
    Info (170000): Node “b2[216]~406”
    Info (170000): Node “b2[217]~408”
    Info (170000): Node “b2[218]~410”
    Info (170000): Node “b2[219]~412”
    Info (170000): Node “b2[220]~414”
    Info (170000): Node “b2[221]~416”
    Info (170000): Node “b2[222]~418”
    Info (170000): Node “b2[223]~420”
    Info (170000): Node “b2[224]~422”
    Info (170000): Node “b2[225]~424”
    Info (170000): Node “b2[226]~426”
    Info (170000): Node “b2[227]~428”
    Info (170000): Node “b2[228]~430”
    Info (170000): Node “b2[229]~432”
    Info (170000): Node “b2[230]~434”
    Info (170000): Node “b2[231]~436”
    Info (170000): Node “b2[232]~438”
    Info (170000): Node “b2[233]~440”
    Info (170000): Node “b2[234]~442”
    Info (170000): Node “b2[235]~444”
    Info (170000): Node “b2[236]~446”
    Info (170000): Node “b2[237]~448”
    Info (170000): Node “b2[238]~450”
    Info (170000): Node “b2[239]~452”
    Info (170000): Node “b2[240]~454”
    Info (170000): Node “b2[241]~456”
    Info (170000): Node “b2[242]~458”
    Info (170000): Node “b2[243]~460”
    Info (170000): Node “b2[244]~462”
    Info (170000): Node “b2[245]~464”
    Info (170000): Node “b2[246]~466”
    Info (170000): Node “b2[247]~468”
    Info (170000): Node “b2[248]~470”
    Info (170000): Node “b2[249]~472”
    Info (170000): Node “b2[250]~474”
    Info (170000): Node “b2[251]~476”
    Info (170000): Node “b2[252]~478”
    Info (170000): Node “b2[253]~480”
    Info (170000): Node “b2[254]~482”
    Info (170000): Node “b2[255]~484”
    3、Error (171000): Can’t fit design in device
    额 这三个~~~我算了下 位宽应该是32位吧~~~ 这样编译没问题 但是出的调试结果还是不对~~~~

    1. 我已经说过了,你肯定不止这一个地方有位宽问题,我建议你跑个仿真波形,到模块内部去把过程信号抓出来,一个个比对看是哪个地方出错了,你直接综合FPGA看结果怎么找错误啊。

  5. [source lang=”verilog”]
    module CNT(CLR,EN,CTRL,CLK,COUT,out_ma); //顶层文件,调用
    input CLR,EN,CTRL,CLK;
    output COUT;
    reg[3:0] DOUT;
    output[6:0] out_ma;

    AD_CNT adcnt(.CLR(CLR),.EN(EN),.CTRL(CTRL),.CLK(CLK),.COUT(COUT),.DOUT(DOUT)); //第一个错误所在
    yimaqi ymq(.in_ma(DOUT),.out_ma(out_ma));

    endmodule

    Error (10663): Verilog HDL Port Connection error at CNT.v(7): output or inout port "DOUT" must be connected to a structural net expression
    Error: Can’t elaborate top-level user hierarchy
    Error: Peak virtual memory: 369 megabytes
    Error: Processing ended: Mon Dec 12 22:21:02 2016
    Error: Elapsed time: 00:00:01
    Error: Total CPU time (on all processors): 00:00:00
    Error: Quartus II Full Compilation was unsuccessful. 4 errors, 1 warning

    [/source]

  6. source lang=”verilog”
    module alu1(clk,rst,x,y,z);
    //32位定点乘法 x*y=z
    //最高位第31位为符号位,第30~20位为整数(11位),第19~0位为小数(20位)=32位定点数
    input x,y;
    input clk,rst;
    output z;
    wire [31:0] x,y;
    wire [31:0] z;
    wire clk,rst;
    reg [1:0] xf,yf,zf; //符号位2
    reg [10:0] ze;
    reg [19:0] zm; //小数部分20位
    reg [30:0] x1,y1;
    reg [61:0] z1;

    always@(posedge clk or negedge rst)
    begin
    xf <= {1'b0,x[31]};
    yf <= {1'b0,y[31]};
    zf = xf+yf;
    //符号位的处理

    x1 <= x[30:20];//31
    y1 <= y[30:20];//31
    z1 = x1*y1;//62

    ze <= z1[50:40];
    zm <= z1[39:20];

    end

    assign z = {zf[0],ze,zm};
    endmodule

    /source
    会这样报错,Warning (10227): Verilog HDL Port Declaration warning at alu1.v(7): data type declaration for "x" declares packed dimensions but the port declaration declaration does not
    x,y,z都是这样报错

  7. `timescale 1ns / 1ps
    //////////////////////////////////////////////////////////////////////////////////
    // Company:
    // Engineer:
    //
    // Create Date: 19:48:31 11/05/2017
    // Design Name:
    // Module Name: decoding
    // Project Name:
    // Target Devices:
    // Tool versions:
    // Description:
    //
    // Dependencies:
    //
    // Revision:
    // Revision 0.01 – File Created
    // Additional Comments:
    //
    //////////////////////////////////////////////////////////////////////////////////
    module decoding(clk,In,Xout_VGA,Yout_VGA,Out,Ready,Xout_VGA_F,Yout_VGA_F,Rout,Cout);
    input clk;
    input [7:0]In;
    output reg [9:0]Xout_VGA;//X输出VGA
    output reg [9:0]Yout_VGA;//Y输出VGA
    output reg [9:0]Xout_VGA_F;//Y输出VGA目的地
    output reg [9:0]Yout_VGA_F;//Y输出VGA目的地
    output reg [7:0]Out;//输出
    output reg [4:0]Ready;//0为数据,1为D,2为.,3为X,4为Y,5为x,6为y,7为R,8为C,9为负号
    output reg[1:0]Rout;//=1记录
    output reg[1:0]Cout;//=1清除

    reg [1:0]Reading;//数据读取
    reg [1:0]XsReading;//小数读取标识
    reg [1:0]Sign;//1为正,0为负
    reg [9:0]Cache;//整数和整体数据缓冲
    reg [1:0]Count;//计数
    //D-12.34XD56.78Y
    initial
    begin
    Reading=0;
    Cache=0;
    Count=1;
    XsReading=0;
    Rout=0;
    Cout=0;
    end

    always @ (posedge clk)
    begin
    Rout<=0;
    Cout<=0;
    Ready<=0;
    if(In==68)//D
    begin
    Reading<=1;
    Ready<=1;
    XsReading<=0;
    end
    if(In==45)//-
    begin
    Sign<=0;
    Ready<=9;
    end
    if(In==46)//.
    begin
    XsReading<=1;
    Ready<=2;
    end
    if(In==88||In==89||In==120||In==121)//X,x,Y,y
    begin
    Reading<=0;
    if(In==88)
    begin
    Ready<=3;
    end
    if(In==89)
    begin
    Ready<=4;
    end
    if(In==120)
    begin
    Ready<=5;
    end
    if(In==121)
    begin
    Ready<=6;
    end
    end
    if(In==82||In==67)//R或者C
    begin
    Reading<=0;
    XsReading<=0;
    if(In==82)
    begin
    Ready<=7;
    Rout<=1;
    end
    if(In==67)
    begin
    Ready<=8;
    Cout<=1;
    end
    end
    end

    always @ (posedge clk)
    begin
    //整数数据读取
    if(Reading==1&&XsReading==0&&In!=68&&Count==1&&In!=45)//第一位
    begin
    Cache<=In-48;
    Out<=Cache[7:0];
    Cache<=(Cache*10);
    Count<=2;
    end
    else if(Reading==1&&XsReading==0&&In!=68&&Count==2&&In!=45)//第二位
    begin
    Cache<=(Cache+In-48);
    Out<=In-48;
    Count<=1;
    end
    //小数
    if(Reading==1&&XsReading==1&&In!=68&&In!=45)
    begin
    Out<=In-48;
    end

    //输出为负数
    if(In==88&&Sign==0)
    begin
    Cache<=464-Cache*2;
    Xout_VGA<=Cache;
    Cache<=0;
    end
    else if(In==89&&Sign==0)
    begin
    Cache<=274+Cache*2;
    Yout_VGA<=Cache;
    Cache<=0;
    end
    else if(In==120&&Sign==0)
    begin
    Cache<=464-Cache*2;
    Xout_VGA_F<=Cache;
    Cache<=0;
    end
    else if(In==121&&Sign==0)
    begin
    Cache<=274+Cache*2;
    Yout_VGA_F<=Cache;
    Cache<=0;
    end
    //输出,为正数
    if(In==88&&Sign==1)
    begin
    Cache<=464+Cache*2;
    Xout_VGA<=Cache;
    Cache<=0;
    end
    else if(In==89&&Sign==1)
    begin
    Cache<=274-Cache*2;
    Yout_VGA<=Cache;
    Cache<=0;
    end
    else if(In==120&&Sign==1)
    begin
    Cache<=464+Cache*2;
    Xout_VGA_F<=Cache;
    Cache<=0;
    end
    else if(In==121&&Sign==1)
    begin
    Cache<=274-Cache*2;
    Yout_VGA_F<=Cache;
    Cache<=0;
    end

    end
    endmodule
    您好,在这段程序中,In是从串口模块中接收的,然后X_out,Y_out,X_out_F,Y_out_F都是输出到VGA模块的,OUT模块的就是重新编码发到串口的TX(检验接收的数据对不对),
    在整数数据读取这段代码中
    if(Reading==1&&XsReading==0&&In!=68&&Count==1&&In!=45)//第一位
    begin
    Cache<=In-48;
    Out<=Cache[7:0];
    Cache<=(Cache*10);
    Count<=2;
    end
    当Out<=Cache[7:0];的时候,串口调试第一位就永远是0,但是如果写成Out<=In-48;就可以读出正确数据,请问一下这是什么原因呢,谢谢了

  8. Cache<=In-48; Out<=Cache[7:0]; 这两句话,相当于是把In-48寄存了一个拍时钟,过一个时钟后才输出到Out,而且你这个always块没有复位信号,所以说第一拍输出其实是随机值,你看到都是0完全是运气原因。在verilog里,<=这个符号是非阻塞赋值,就是说,Out <= Cache[7:0]这句话跟Cache <= In - 48是同时发生的,就好像两个人在河边传水桶救火,前一个人Cache还在跟In - 48取水桶,同时后面一个人Out也在把Cache上一次拿着的水桶往下传,就好像一个流水线一样,大家都是同时在不停工作的。这个跟软件是不一样的,没有说要先执行上一句才执行下一句的说法。

    1. 十分感谢您的解答,目前是改成了阻塞赋值,然后可以正常运行了。但是verilog似乎不支持类似a=a+b,a=a*b
      这种格式,
      似乎应该用
      c=a+b;
      a=c;来实现,我想可能是是因为实际电路中无法实现a=a+b这种操作的原因,不知道是否正确

      1. verilog是支持always@(posedge clk)里面的a<=a+b的, a=a+b其实也可以支持,但是使用的条件有限,你必须非常清楚自己代码对应的电路才能保证不会写出死循环。

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